There are prizes worth 20 thousand for this event.
In the world of portable devices, the power dissipation has already become a significant
problem where power dissipation considerations require trade-offs between transistors
density and operational speed affecting other parameters of the analog design octagon
namely, noise, linearity, voltage swings, gain, input/output-impedance, speed, supply
voltage. The VLSI Analog Design Contest will provide a platform to showcase original “power-aware”
circuit design targeting the best power and energy- efficiency improvement without
compromising on other aspects of design octagon.
Rules & Team Members
The number of team members may vary from 1 to a maximum of
The rulebook of the event can be seen here.Click here
Each participant needs to register at Advitiya, and pay the registration fee. The Team
Leader may then register the participants using the participation code provided to each